SMTS Physical Design

  • Bangalore, India

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead MTS Physical Design Engineer to join our MIC Design IDC team in Bangalore. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

 

Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Responsibilities

  • Complete ownership of Static timing analysis at full chip level for high speed mixed signal design
  • Experience doing multi-mode multi-corner (MMMC) timing and power analysis using primetime/Tempus.
  • Experience in DMSA/Tweaker ECO flows for PPA improvements.
  • Experience in manual timing fixes, ECO generation for MCMM mode corners. 
  • Good understanding of SDC constraints and able to translate timing requirements into constraints.
  • Responsible for integrating the blocks, analog Ip’s for full chip timing analysis.
  • Well aware of place and route methodologies and hands on experience with timing convergence
  • Good communication skill to negotiate with top level for convergence.
  • Work closely with Project leader for creating schedule, tracking and raising issues / risks to project management.
  • Participate in Mentoring new joiners in the group on technical skills.
  • Provide inputs for CAD/DA team from Design Implementation perspective.
  • Work closely with Logic design team and Analog teams to provide inputs from physical design and STA.
  • Work closely with DFT team on scan aspects and provide inputs from physical design.
  • Continuously work on methodology and productivity improvements.

Qualifications

  • Must have at least 10 – 12 years of experience, out of which at least 8 years should be related to STA/Synthesis .
  • Must have Involved in high Speed design tape-outs and constraint development across modes.
  • Must have detailed knowledge of Constraints , Signoff closure methodology for STA and RTL2GDS flow is desired
  • Experience in Tcl/Tk, PERL is a Plus.

About Rambus

Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.

 

Rambus offers a competitive compensation package, including base salary, bonus, equity and employee benefits.

 

Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard.


Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

 

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.

 

Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.

 

For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.

Apply Now

Please send me more jobs like this by email

Not You?

Thank you

People Also Viewed

MTS CAD Engineering

2023-21171 Bangalore India Bangalore, India Engineering
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional SMTS CAD Engineer to join our Corporate Ops CAD team in Bangalore, India. Candidates will be joining some of the brightest inventors and engineers in the world to de...

PE Logic Design

2024-21361 Vught Netherlands Boxtelseweg 26A, Vught, Netherlands Engineering
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead Member of Technical Staff Logic Design Engineer to join our Silicon IP team in Vught part of the Security Business Unit of Rambus. Candidates will be joining so...

Principal Layout Engineer

2024-21442 Shanghai China 1/F, Building 10, No. 696 Weihai Road, Shanghai, China, 000001 Engineering
Rambus, a premier chip and silicon IP provider, is seeking to hire a exceptional Layout Designers  to join the DDR interface team in Johns Creek, GA. Candidates will be joining some of the brightest inventors and engineers in the world to develop ...

Senior Principal ASIC Static Timing Designer

2024-21440 Chapel Hill North Carolina United States 1512 East Franklin St., Suite 200, Chapel Hill, North Carolina, United States, 27514 Engineering
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Senior Principal Static Timing Design Engineer to join our Memory Interface Design team in Raleigh, North Carolina (remote option available). Candidates will be join...

Principal Verification Engineer-DDR Exp

2023-21117 San Jose California United States Work from Home Location, San Jose, California, United States, 95134. 4453 North First Street, Suite 100, Alviso, San Jose, California, United States, 95134 Engineering
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Principal Verification Engineer to join our Memory Interconnect Design team in San Jose, California. Candidates will be joining some of the brightest inventors and e...

SMTS Build Release Engineer

2024-21420 Vught Netherlands Boxtelseweg 26A, Vught, Netherlands Engineering
Rambus, a premier chip and silicon IP provider, is seeking for a dynamic, highly motivated, experienced Senior Scripting and Automation Engineer, having a strong affection with embedded hardware development and its development tools, to join our S...

Job Alerts

Not You?

Thank you

Apply Now

Please send me more jobs like this by email

Not You?

Thank you