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Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead Engineer to join our IP Engineering PHY/Logic Design team in Bangalore. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.
As a Lead Engineer, which is a Full-Time position, you will integrate PCIe sub-system. Sub-system will have pre-dominantly PCIe compliant PHY and controller. Sub-system may contain various other IPs as well based on use case. It will also contain IP specific glue logic as IPs on sub-system come from various IP providers.
With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions speed performance, expand capacity and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.
Rambus offers a competitive compensation package including base salary, bonus, equity, employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.
Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.
For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.