PE,Logic Design Engineering

Bangalore | India

Responsibilities

Description:

  • Develop micro-architecture and RTL design for digital components for DDR memory buffer products
  • Setup and analysis of lint, synthesis, timing and DFT reports
  • Support Protocol validation activities
  • Must be a team player with good written and verbal communication skills
  • Must be self-motivated and detail-oriented and have the ability to work with cross functional and globally dispersed teams

Qualifications

Skills/Qualifications:

  • MS/M-Tech degree in electronics/VLSI or B.E/B-Tech in electronics engineering with strong relevant experience
  • 10+ Years of Digital Logic Design experience
  • Experience working with multiple clock domains
  • Experience with synthesis flow
  • Knowledge of DDR interfaces is a strong plus

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