Principal Logic Design Engineer - SJ, CA (20882)

  • 4453 North First Street, Suite 100, Alviso, San Jose, California, United States, 95134

Rambus, a premier chip, and silicon IP provider, is seeking to hire a talented, exceptional Princiapl Logic Design Engineer to join our Rambus Security Division (RSD) in San Jose. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

 

This engineer will participate in the verification of HW security IP cores developed by RSD, working with cross functional teams including ASIC design engineers and architects, other verification engineers and system test engineers, security experts, and cryptographers. Cryptography and hardware security experience is not required, but an ability to, and interest in, learning about these areas is important.

 

As a Principal Logic Design Engineer, the candidate will be reporting to Director of Hardware Engineering and is a Full Time position.

 

Location: On-site in our San Jose, California corporate offices.

Responsibilities

  • Work with System architects and Software architects to define Hardware Architecture specifications for our IP products.
  • Own major blocks of the IP design and produce robust IP products while completing micro architecture design, RTL implementation and back end flows for the IP.
  • Provide technical leadership in implementation and development of our HW security products
  • Represent the HW team in cross functional forums involving Program Managers, Product Managers and Sales teams.
  • Develop and produce collateral for easy integration of our IP products in SOC’s/FPGA’s
  • Develop and improve existing FPGA and ASIC flows and methodologies in collaboration with other team members.

Requirements/Qualifications: 

  • BS or MS degree in electrical or computer engineering or closely related degree. 
  • Ten years of experience working as an ASIC/FPGA/SOC Design engineer or related field. 
  • Strong written and verbal communication skills in English. 
  • Strong experience in Digital Design including data and control paths, interfaces, interconnects, CPU, etc.  
  • Experienced at producing highly detailed architecture/micro arch specifications for complex blocks, sub-systems or SOC and delivering high quality designs for blocks/sub-systems. 
  • Solid understanding and experience of standard ASIC Design techniques, including:
  • RTL development (Verilog preferred)
  • Clock domain crossing
  • Synthesis, LINT, LEC and other back end flows
  • Equivalent FPGA Design experience may substitute in some cases. 
  • Comfortable working with industry standard tools (synthesis, LEC, LINT) and UNIX development environment (make, scripting, SVN, etc.) 
  • Strong knowledge of or experience in industry-standard interfaces 
  • Strong problem-solving skills and detail oriented 

 

Qualifications

Beneficial Experience

  • Experienced in leading IP development, improving methodology, cross-site teams.
  • Experience in creating or optimizing designs for FPGA, implementation on FPGA platforms, bit file creation for FPGA emulation/acceleration.
  • Familiarity with IP integration, IP core delivery, and handoff issues
  • Working understanding of verification methodologies
  • Experience with Formal Verification tools
  • Data, software, and/or network security; cryptography

Personal Attributes

  • Able and willing to work in a team-oriented, collaborative environment
  • A demonstrated ability to prioritize and execute tasks to achieve goals in an innovative, fast paced, and often high-pressure environment
  • Proven analytical and creative problem-solving abilities
  • Passionate about writing clean and neat code that adheres to coding guidelines

About Rambus

 

With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions speed performance, expand capacity and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.

 

Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.

 

Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

 

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, you may let us know in the application.

 

For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.

 

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