PE Verification Engineering

  • Bangalore, India

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Principal Engineer to join our IDC verification team in Bangalore. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

 

Responsibilities

  • Lead the IP verification execution, own verification schedule and deliverables.
  • Mentor and provide technical guidance to team working in the projects.
  • Understand design specification, define verification TB architecture, create verification plan and environment.
  • Participate in technical discussions and represent verification team in all the discussions with internal and external customers.
  • Fully accountable for quality design verification as per the schedule.
  • Track the verification progress, identify potential risks, and mitigation plan.
  • Review all technical deliverables from team members and guide team members to meet quality and the schedule.
  • Contribute to verification process and methodology improvements to boost efficiency and productivity.

Qualifications

  • Bachelor's/Master's degree in Electronics/Electrical Engineering
  • 10+ years of verification experience
  • Expert in verification tools, flow, methodology, and good track record of achieving verification excellence.
  • IP verification experience either in Serdes or memory IP domain, In-depth understanding of design architecture features and used cases.
  • Sound verification knowledge of mixed-signal design at Verilog and AMS level.
  • Should have knowledge on all aspects of verification components & verification closure.
  • Hands-on experience on block, IP and system level verification.
  • Should have involved in IP verification from verification plan to final verification signoff for minimum of 2-3 IPs.
  • Should have flair for documentation, defining/improving methodology and achieving productivity improvement
  • Good on project planning, resource estimate and breaking verification work into independent tasks. Identify potential risks, present/discuss risks, problems, mitigation plan with project stake holders.
  • Expert on coverage driven verification methodology, functional and code coverage closure.
  • Hand-on experience on GLS and SDF verification, optimizing the GLS run time and performance.
  • Excellent in communication and interpersonal skills, demonstrate teamwork and collaboration skills.   

 

About Rambus

With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions speed performance, expand capacity and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.

Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.

  
Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

 

For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.

 

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