Senior Package Signal Integrity Engineer

Sunnyvale | United States

At Rambus, we are turning incredible possibilities into everyday reality by helping to deliver the innovations that greatly impact the world we live in. We create leading-edge semiconductor and IP products, spanning memory and interfaces to security to smart sensors. Our products are integrated into tens of billions of devices and systems around the globe, running critical applications for Big Data, Internet of Things (IoT), mobile, consumer and media platforms.

 

And our history runs deep – we have been in Silicon Valley for 25+ years and are continually anticipating key technology trends and are developing innovations that drive market changes. From a pure IP provider to becoming a fabless chipmaker, Rambus is evolving to address critical challenges in the semiconductor industry.

 

As a dynamic organization, we are always seeking to hire exceptional talent to join some of the brightest inventors and engineers in the world to explore their passions to develop products that have real life impact. As well, Rambus benefits are among the most comprehensive and competitive in Silicon Valley.

 

Rambus is looking for an experienced IC signal integrity/power integrity/package design engineer for the Systems Engineering team in the IP Business Unit. The suitable candidate will be involved in the design and development phase of both high-speed complex IP PHY development, as well as semiconductor product chips targeting leading edge high speed SerDes and Memory PHYs.

 

You will be responsible for completing SI/PI modelling and analysis of the memory/SerDes system channel comprising of die, package, and PCB. You will be responsible for SI Channel simulations, PDN Noise analysis, and ensuring that all the channel components meet the electrical signal integrity and power integrity requirements of the product. You will make recommendations on package and PCB routing, bump-layout on the die, and BGA pin arrangement on the PCB.

 

Why you want this job:

  • Rambus is engaged in the design of high end IP cores such as 112G SERDES, GDDR6 Memory PHYs and Buffer Chip product ICs, and provides a rare opportunity to work on these cutting-edge designs.
  • Project ownership, chance to drive the projects, and share ideas across highly technical functional groups.
  • Package design projects are impactful with real performance feedback coming from both in-house test chips, products, and from customer ASICs build with your design inputs.

Responsibilities

  • Recommend package layer stack-up, material, impedance targets and net assignments for signals
  • Complete package designs and parasitic extractions for Rambus products and IP Phys
  • Optimize single-ended/differential insertion loss, return loss, cross-talk for signals and high speed buses
  • IR Drop and PDN optimization in packages/interposers. Recommend caps on packages
  • Complete system level PDN analysis and recommend decoupling strategies
  • Optimize and implement routing for high-speed signals and power planes
  • Document design guidelines for package designs
  • Proactively work on documentation in the form of user guide and integration guide to address customer integration questions.
  • Design BGA packages for high frequency integrated circuits using Allegro Package Designer using SIP Layout
  • Develop package designs for signals exceeding 100Ghz GHz using RF transmission lines
  • Complete package extractions (signal and power) using Cadence tools (PowerSI) and Ansys tools (Electronics Desktop, HFSS, SiWave)
  • Complete system level PDN analysis using Keysight ADS, HSPICE
  • Complete transient channel simulation using Keysight ADS, HSPICE

Qualifications

  • Strong background in Electromagnetics and Transmission Line principles
  • Experience with IC package/interposer design tools such as Cadence APD or SiP
  • Strong interpersonal, written and verbal skills to work with vendors and internal customers (design teams) and external customers
  • Proficient in 2D/3D with modelling tools such as Cadence Sigrity, Ansoft HFSS/Q3D, Keysight ADS
  • Knowledge of high speed bump compliance including DDR3/DDR4/GDDR6. LPDDR4, PCIE3/4, 10GKR, 28G Ethernet, 56G PAM4. 112G PAM4
  • Strong understanding of package substrate manufacturing design rules and materials
  • Bachelor's and/or Master’s Degree in Electrical and/or Electronic Engineering, Computer Engineering or Physics
  • 5+ years relevant experience in high speed package design and signal integrity
  • Strong communication skills and ability to interact with both internal and external customers to understand how to best address requirements in terms of their package requirements.
  • Technically creative and results-oriented with the ability to manage multiple tasks
  • High degree of self-motivation and personal responsibility
  • Have the ability to work well within a team environment

 

Rambus offers an extremely competitive compensation package, which includes a strong base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.

 

Rambus creates cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting. Our chips, customizable IP cores, architecture licenses, tools, services, training and innovations improve the competitive advantage of our customers.

We collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation labs.

Our products are integrated into tens of billions of devices and systems, powering and securing diverse applications, including Big Data, Internet of Things (IoT), mobile, consumer and media platforms.

 

At Rambus, we are makers of better. For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.

 

Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law.

 

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures.

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