SMTS II,Security Engineering

Rotterdam | Netherlands

The Rambus Security Division (RSD) is dedicated to providing a secure foundation for a connected world. Integrating technologies from Cryptography Research, Bell ID and Ecebs, our innovative solutions span areas including tamper resistance, content and media protection, network security, mobile payment, smart ticketing, and trusted transaction services. Our technologies protect nearly nine billion licensed products annually, providing secure access to data and creating an economy of digital trust between our customers and their customer base. As a premier provider of security solutions, the Rambus Security Division focuses on market sectors that present opportunities for rapid deployment of innovative technologies to meet consumer needs.

Responsibilities

Rambus is seeking for a dynamic, highly motivated, experienced Senior Security Engineer. The ideal candidate will be team oriented, highly skilled on side-channel analysis, fault analysis, and digital design relating on security ICs in deep nanometer technology nodes

She/he will have a strong knowledge of the HW security including side-channel analysis and fault analysis.  In addition, She/he possesses an in-depth knowledge of front end digital design process and related design flows.

Responsibilities

  • Design and implement secure cryptographic hardware IP blocks as part of cryptography research’s security IP portfolio.
  • Implement fault and  side-channel analysis countermeasures and verify resistance to state-of-the-art attack techniques
  • Invent, patent and publish new techniques in the fields of DPA countermeasures, fault resistance and efficient hardware designs
  • Supports FAEs, customers, and Rambus sales and marketing team in Europe and Asia and work closely with our offices in Sunnyvale, San Francisco, and Bangalore
  • Collaborates with different teams to support all technical aspects of the sales cycle
  • Represent Rambus CRD at international workshops, conferences and trade shows.
  • Author technical collateral and whitepapers on CRD’s cryptographic hardware technologies  

Qualifications

Required Skills

  • 5+ years of experience in secure hardware design
    • Detailed knowledge in secure logic styles and masking techniques (threshold implementations, multi-party computation, etc.)
    • Design and implementation of efficient cryptographic algorithms that implement side-channel analysis countermeasures
    • Well versed in FPGA and ASIC design flows, signal processing, hardware description languages (Verilog, VHDL), System C, embedded programming development
  • Strong standing within the cryptographic hardware research community as evidenced by an outstanding publication record at top conferences
  • Must have good communication skills and takes responsibility for independent planning and executing of all aspects of secure hardware design
  • Self-motivated, independent worker with strong leadership skills

 Educational Requirements 

  • MSc or PhD in Electrical/Computer Engineering, Computer Science, or related field. (PhD strongly preferred)

 Preferred Skills

  • Side-channel analysis including hardware implementation of DPA countermeasures
  • Fault analysis in security IC related topics
  • Knowledge of HW security architectures and IPs (secure MCU cores, cryptographic co-processors, secure memories, sensors, detectors, secure elements, smart cards)
  • Architecture definition, sizing and behavioral modeling (C, C++, Matlab)

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