SMTS Verification Engineering
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Engineer to join our IDC verification team in Bangalore. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.
Responsibilities
- Define entire verification architecture for all system memory coherency aspects
- Deep dive into microarchitecture of all agents and subsystems involved with system coherency
- Define verification architecture, develop test plans and build verification environment
- Work with design team to understand design intent and bring up verification plans and schedules
- Verify Subsystems and Full SoC using advanced verification methodologies
- Build agents and checkers from scratch. Perform and write test plan from design architecture specs and/or protocol standard
- Debug test cases and report verification result to achieve expected code/functional coverage goals
- Assist in silicon bring-up, debug and characterization
Qualifications
- Define entire verification architecture for all system memory coherency aspects
- Deep dive into microarchitecture of all agents and subsystems involved with system coherency
- Define verification architecture, develop test plans and build verification environment
- Work with design team to understand design intent and bring up verification plans and schedules
- Verify Subsystems and Full SoC using advanced verification methodologies
- Build agents and checkers from scratch. Perform and write test plan from design architecture specs and/or protocol standard
- Debug test cases and report verification result to achieve expected code/functional coverage goals
- Assist in silicon bring-up, debug and characterization