Sr. ASIC Verification Engineer (Security) - San Jose, California #20517

  • 4453 North First Street, Suite 100, Alviso, San Jose, California, United States, 95134

Rambus, a premier chip, and silicon IP provider, is seeking to hire a talented, exceptional Sr. ASIC Verification Engineer to join our Rambus Security Division (RSD) in San Jose. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

 

This engineer will participate in the verification of HW security IP cores developed by RSD, working with cross functional teams including ASIC design engineers and architects, other verification engineers and system test engineers, security experts, and cryptographers. Cryptography and hardware security experience is not required, but an ability to, and interest in, learning about these areas is important.

 

As a Sr. ASIC Verification Engineer, the candidate will be reporting to Director of Hardware Engineering and is a Full Time position.

 

Location: On-site in our San Jose, California corporate offices.

Responsibilities

  • Lead the design and implementation of verification methodologies, test plans, testbenches, infrastructure, and platforms
  • Work with ASIC designers and architects to produce thoroughly verified, robust IP
  • Represent verification methodologies in front of key customers and executive management
  • Architect IP development and productization, quality assurance, and release automation flows

Qualifications

  • BS or MS degree in electrical or computer engineering or closely related degree strongly preferred; but substantial, relevant, outstanding work experience may substitute in some cases
  • Twelve or more years of experience working as a verification engineer or related field
  • Strong written and verbal communication skills: Ability to explain complex concepts in front of both a technical audience and customers/management
  • Strong desire to take ownership of all verification aspects of a project, including team and methodology leadership
  • High technical competence that includes a track record of on-time, effective verification of complex digital designs.
  • Solid understanding of standard ASIC verification techniques, including:
    • Test planning
    • Testbench creation
    • Code and Functional coverage
    • Directed and random stimulus generation
    • Assertions
  • Solid understanding of verification methodologies, especially UVM (SystemVerilog)
  • Comfortable in a Unix development environment (make, scripting, SVN, etc.), and with industry-standard EDA tools (VCS, Xcelium)
  • Familiarity with advanced verification techniques such as fault/stimulus injection, FPGA prototyping, and/or formal verification

 Beneficial Experience

  • Experience leading multi-site teams and projects, including task and schedule estimation
  • Experience in a customer-facing role
  • Experience developing object-oriented testbench infrastructure in UVM
  • Experience solving IP integration, IP core delivery, and handoff issues
  • Experience with configurable IPs and automated QA and release flows
  • Experience in creating and debugging FPGA bitfiles for emulation/acceleration/prototyping purposes
  • Data, software, and/or network security; cryptography
  • Ability to work with technical writers in the production of technical documentation

 Personal Attributes

  • Excellent written, verbal, and interpersonal communication skills
  • Able to communicate ideas in both technical and user-friendly language
  • Able and willing to work in a team-oriented, collaborative environment
  • A demonstrated ability to prioritize and execute tasks so as to achieve goals in an innovative, fast-paced, and often high-pressure environment
  • Proven analytical and creative problem-solving abilities
  • Passionate about writing clean and neat code that adheres to coding standards

 

About Rambus

 

With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions that speed performance, expand capacity and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.

 

Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.

  
Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

 

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, you may let us know in the application.

 

For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.

 

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Req: 20517

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