Sr. FPGA Design Engineer

  • 4453 North First Street, Suite 100, Alviso, San Jose, California, United States, 95134

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr. FPGA Design Engineer to join our Bufferchip team in San Jose, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

 

As a Sr. FPGA Design Engineer, the candidate will be reporting to the Sr. Director of Validation Engineering and is a Full-Time position.

Responsibilities

  • FPGA prototype specification and development. Work with embedded software, design architecture, and experts on the functional and performance requirements in the validationm development and bring-up preparation

  • Functional verification support for validation platform and ensure bring up is emulated before silicon arrival

    Design and verify FPGA prototype, incorporating RTL blocks from various sources and developing new blocks.
  • Ownership of FPGA implementation flow, including synthesis, place & route, and timing closure.
  • Develop plans to bring-up, debug, and validate FPGA prototype.
  • Hands-on debug of hardware and FPGA in the lab using internal FPGA logic analysis tools, such as ChipScope.
  • Work with firmware team to validate and debug code running on an embedded ARM processor.
  • Support performance validation utilizing lab equipment and server systems.

Qualifications

  • B.S. or M.S. degree in Electrical Engineering or Computer Science.
  • 5+ years of technical experience in RTL-based logic design
  • Experience with FPGA implementation from design specification to physical implementation.
  • Proficient in using FPGA design IPs and platforms, such as Xilinx Vivado.
  • Experience with lab equipment, especially oscilloscopes and pattern generators.
  • Experience writing lab automation scripts, especially in Python.
  • Preferred Experience in embedded programming in C/C++
  • Must be a team player and work well with other lab engineers and designers

Desired Skills:

  • Experience with PCIe protocol.
  • Experience with DDR memory protocol.
  • Experience with embedded ARM processor cores.
  • Working knowledge of test and measurement equipment, automation and debugging.
  • Hands-on hardware experience with x86 computer systems.

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About Rambus

With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions speed performance, expand capacity and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.

Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.

Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, you may let us know in the application.

For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.

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