Sr. Manager Digital IC Design (ASIC, FPGA) - France, India or Taiwan #20763

  • 805 av J.R.G.G de la lauziere, Aix-en-Provence, France, 13290
  • Bangalore, India
  • 17F/B, No. 167, Taipei, Taiwan, 105

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr. Manager Digital IC Design (ASIC, FPGA) to join our Interface IP team in France. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

 

As the Sr. Manager Digital IC Design you will join the R&D team to lead an international team of Integrated Circuit (IC) Design Engineers and Architects working on complex semiconductor IP developments.  Post COVID this will be a hybrid working environment with 2 days in office and 3 days per week remote.

 

Location: France, India or Taiwan. Relocation and sponsorship available.

 

Responsibilities

TEAM MANAGEMENT

  • Line management of a large and growing team of design engineers
  • Mentor and support team members in their career development
  • Provide technical direction to the design team and the overall organization on all aspects of design 
  • Contribute to the recruitment process

PROJECT MANAGEMENT

  • Establish measurable and achievable goals with a view to continuously improve overall design productivity and quality
  • Build strong partnerships with functional groups like verification, validation, and support, to effectively align design execution
  • Lead project planning, staffing, execution and reporting
  • Set milestones, assign and track tasks 

DESIGN

  • Drive design activities
  • Contribute to strategic decisions on design methodology, tools, IP architecture and microarchitecture

Qualifications

REQUIRED SKILLS

  • Verilog or VHDL RTL Design
  • ASIC and FPGA design flow

FURTHER DESIRABLE KNOWLEDGE

  • High performance computing system, processor, cache coherency, chipset and ASICs
  • High speed interface protocols like PCIe, CCIX, CXL, Gen-Z, others
  • High performance memory interfaces
  • Knowledge on High Speed Serdes and PHY PMA
  • Proficiency in programming and/or scripting languages (Python, Cshell…)

Qualifications

  • 15 years minimum experience in semiconductor development
  • Significant experience in technical lead, project management and people management
  • Expertise in ASIC and FPGA design and associated tools
  • Good English skills, communication skills, and willingness to work with an international team

 

About Rambus

With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions speed performance, expand capacity and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.

 

Rambus offers a competitive compensation package, including base salary, bonus, equity, and employee benefits.

  

Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

 

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, you may let us know in the application.

 

For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.

 

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Req: 20763

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