Sr Principal Engineer, Memory Architect - 20156

  • 4453 North First Street, Suite 100, Alviso, San Jose, California, United States, 95134
  • 1512 East Franklin St., Suite 200, Chapel Hill, North Carolina, United States, 27514

Dedicated to making data faster and safer, Rambus creates innovative hardware, software and services that drive technology advancements from the data center to the mobile edge. Our architecture licenses, IP cores, chips, software, and services span memory and interfaces, security and emerging technologies to positively impact the modern world. Our customers are leading chip and system design firms, foundries, and service providers. Our products are integrated into tens of billions of devices and systems. They power and secure diverse applications in a growing number of target segments including data center, networking, AI, automotive and IOT.

 

Rambus is seeking to hire exceptional talent to join some of the brightest inventors and engineers in the world to develop products that have real life impact. This is a challenging position that is balanced between technology development, project planning, and customer interaction. You will have the opportunity to contribute to the full life cycle of a project: from product definition to tapeout of customer design. You will work with a small but highly experienced team where your ideas and efforts will make a difference.

Responsibilities

  • Work with marketing and system architects to define leading-edge serial memory buffer products
  • Write detailed chip architecture specifications
  • Identify and select IP blocks, working with both internal design teams and external vendors
  • Work with silicon design, verification, and validation teams to guide successful product implementation

Qualifications

  • Silicon device architecture expertise in the following areas:
    • PCIe 5.0 transaction, data link, and physical layers - PCIe 5.0 software stack / driver experience is a plus
    • CXL 2.0 io, cache, and memory protocols
    • High-performance on-chip interconnect - switch architecture knowledge is a plus
    • DDR5 memory controller and PHY
    • Embedded management processors
  • Experience selecting and integrating silicon IP for the architectural areas listed above
  • Experience writing detailed architecture specifications for complex silicon devices

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Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.

Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, you may let us know in the application.

For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.

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